Category: Silicon/Dielectrics Etch
Silicon is most well-known as a semiconductor material, but because of its high mechanical strength and ease of processing, it is also commonly used in a wide variety of devices such as MEMS, optical components, micro-channel devices, and packaging. There are many methods for processing silicon, such as dry etching, wet etching, and laser processing, each of which has advantages and disadvantages that should be evaluated carefully and compared.
The processing method called Si-DRIE is a type of plasma dry etching. The etching technology cultivated for semiconductors has improved the processing of mechanical devices and has been proven to allow faster and deeper etching of features with higher aspect ratios. Among Si-DRIE techniques, there are three main process types: the Bosch process, Non-Bosch processes, and Cryogenic etching. Since silicon and fluorine atoms react very easily, processing silicon using a simple fluorine chemistry process results in an isotropic profile. Therefore, the key for increasing the verticality and aspect ratio for any of the three process types is to suppress lateral etching and develop an anisotropic process.
The Bosch process is a technique which alternates between depositing a protective film on the sidewall using a C4F8 plasma and etching the bottom of the trench or hole with SF6. The Non-Bosch process is a technique of simultaneously depositing a protective layer on the sidewall and directionally etching the bottom of the feature with ions. Cryogenic etching is a method similar to the Non-Bosch process and suppresses the chemical reaction of Si and F atoms on the sidewall by lowering the substrate temperature to that of liquid nitrogen.
The Bosch process has excellent selectivity and is capable of high aspect ratio etching and is often used for MEMS and packaging. On the other hand, the Non-Bosch process has smooth sidewalls with positive taper angle, which is useful for through-silicon vias (TSV). Additionally, the angle of the mask can be transferred into the etched material, which is often done for optical parts such as lenses. The Cryogenic etching process can achieve the selectivity of an oxide mask vs silicon equivalent to that of the Non-Bosch process. One drawback of this technique is that photo resist masks cannot be used due to the extremely low temperature of the process.
On Samco’s flagship RIE-800iPB deep reactive ion etching (DRIE) system it is possible to utilize both the Bosch and Non-Bosch processes on the same system. The Bosch process enables deep and high aspect features along with extraordinary levels of selectivity to the mask. The Non-Bosch process provides deep etching with smooth sidewalls and a flexible range of taper angles. Substrate temperatures between -10°C and 20°C are controlled via liquid cooling of the bias electrode combined with electrostatic chucking (ESC) and substrate back side He gas cooling. By combining these two methods, the RIE-800iPB delivers versatile, efficient, gentle and affordable solutions for MEMS, TSV, packaging, and other applications. It’s been exciting to see the continual evolution of our Si DRIE solutions as we incorporate new customer requirements into the system design. Do you have a process challenge? Give our experienced process engineers the opportunity to meet your challenge and exceed your expectations.
What the Samco Si-DRIE Can Do?
Anisotropic Silicon Deep Reactive Ion Etching process using the Bosch Process and Non-Bosch Process enables trench, hole and pillar fabrication for various device applications. These are some examples of structures fabricated using the Bosch Process. For more details, please visit the processes below.
Samco Product Portfolio for Silicon Deep Reactive Ion Etching
Our systems have industry-leading process capabilities, and the product lineup covers both R&D and production.
Yuanhui Fang, Jian Zhang, Yu-Long Jiang
School of Microelectronics, Fudan University, Shanghai 200433, China
2018 18th International Workshop on Junction Technology (IWJT), Shanghai, 2018, pp. 1-3.
Samco RIE Plasma Etching Equipment was used for tungsten etching and SiO2 etching with the tungsten hardmask.
Celluloid Microenclosure and Microlens Array Fabricated by Suzukiʼs Universal Microprinting Method and XeF2 Vapor Etching for Microbial Analysis
Akihiro Matsutani1 and Ayako Takada2
1 Semiconductor and MEMS Processing Division, Technical Department, Tokyo Institute of Technology,
4259 Nagatsuta, Yokohama, Kanagawa 226-8503, Japan
2 Biomaterials Analysis Division, Technical Department, Tokyo Institute of Technology,
4259 Nagatsuta, Yokohama, Kanagawa 226-8501, Japan
Sensors and Materials, Vol. 30, No. 1 (2018) 149–155
A celluloid-based biochip for cell trapping is fabricated using Suzuki’s universal microprinting (SUMP) method. Samco tabletop Reactive Ion Etching (RIE) system was used for mold fabrication. Si layer was etched over photoresist and Cr mask in fluorine chemistry.
For more information on our RIE system lineup, please visit the product page below.
Yoshihiro Kawata, Kazuki Aoki, Yuhi Inada*, Takeshi Yamao, and Shu Hotta
Faculty of Materials Science and Engineering, Kyoto Institute of Technology, Kyoto 606-8585, Japan
Japanese Journal of Applied Physics 57, 03EH11 (2018)
In this paper, direct fabrication of gratings was performed on HMDS-treated SiO2/Si substrates. Samco plasma etching system at Kyoto Institute of Technology was used for plasma etching of SiO2/Si substrates for grating fabrication over an organic semiconducting oligomer 5,5AA-bis(4-biphenylyl)-2,2A:5A,2AA-terthiophene (BP3T). The system was also used for estimate of BP3T etch resistivity.
Nanofabrication of 10-nm T-shaped gates using a double patterning process with electron beam lithography and dry etch
Jinhai Shao1, Jianan Deng1, W. Lu2 and Yifang Chen1
1Fudan University (China), 2Ohio State University (United States)
J. of Micro/Nanolithography, MEMS, and MOEMS, 16(3), 033508 (2017).
T-shaped gates with the footprint scaling down to 10 nm were fabricated using a double patterning procedure (electron beam lithography and dry etching). Samco Reactive Ion Etching Tool RIE-10NR was used for pattern transfer of metal nanoslit on SiNx layer in fluorine-based chemistry.
Sensitivity of Piezoelectric Ultrasonic Microsensors with Sol-Gel Derived PZT Films Prepared through Various Pyrolysis Temperatures
Kaoru Yamashita, Shota Nakajima, Jo Shiomi and Minoru Noda
Graduate School of Science and Technology, Kyoto Institute of Technology, Kyoto 606-8585, Japan
2017 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK), Kyoto, Japan, 2017, pp. 108-109.
In this paper, MEMS ultrasonic microsensors with sol-gel derived PZT piezoelectric diaphragm was fabricated. In device fabrication, Samco silicon Deep RIE etcher RIE-400iPB was used to form the thin diaphragm structure by silicon plasma etching from the wafer backside.
Stress control of PZT thin film was carried out to investigate high ultrasonic sensitivity of the devices.
Samco provides silicon deep RIE etching technologies utilizing the Bosch Process to R&D labs for MEMS device and TSV processing applications. For more information on our process technologies of deep silicon etching, please visit the process data page below.
Silicon Deep RIE Process Data
Low-power, low-pressure reactive-ion etching process for silicon etching with vertical and smooth walls for mechanobiology application
Mohammed Ashraf, Sree V. Sundararajan, Gianluca Grenci
National University of Singapore, Mechanobiology Institute, Singapore
J. Micro/Nanolith. MEMS MOEMS. 16(3), 034501 (Jul 10, 2017).
Silicon plasma etching was carried out using RIE etcher RIE-10NR. Low-power etching process was newly developed in fluorine chemistry to fabricate vertical smooth sidewalls.
National University of Singapore is one of Samco’s proud customers. As seen in this paper, Samco RIE etcher RIE-10NR shows process versatility with excellent profile control for university lab users. The system can offer a wide range of process window for etching of various materials (silicon, SiO2, SiNx, metals and polymer).
For more details of our process capabilities of silicon etching, please visit the process data page below.
Silicon Plasma Etching
Min Wang1,2, Yulian Zhang1, Linfeng Lu1, Dongdong Li1 and Xufei Zhu3
1 Shanghai Advanced Research Institute, Chinese Academy of Sciences, 99 Haike Road, Zhangjiang Hi-Tech Park, Pudong, Shanghai 201210, People’s Republic of China
2 University of Chinese Academy of Sciences, Beijing 100039, People’s Republic of China
3 School of Chemical Engineering, Nanjing University of Science and Technology, Nanjing 210094, People’s Republic of China
Mater. Res. Express (2017) 4 055005
Crystalline silicon nano-hole array was fabricated using UV nanoimprint (UV-NIL) technology for potential silicon solar cell applications. Samco RIE ether, RIE-10NR was used in device fabrication for photoresist ashing and silicon plasma etching processes. Nano-hole array structures were successfully fabricated.
For more details of Samco RIE etcher lineup, please visit the product page below.
RIE Plasma Etcher
We provide several systems to meet each customer’s process requirements in plasma etching processes.
Ryan J Morris1, Trung V Phan2, Matthew Black3, Ke-Chih Lin4, Ioannis G Kevrekidis5, Julia A Bos3 and Robert H Austin2
1 School of Physics & Astronomy, University of Edinburgh, Edinburgh EH9 3FD, United Kingdom
2 Department of Physics, Princeton University, Jadwin Hall, Princeton, NJ 08544, United States of America
3 Lewis-Sigler Institute for Integrative Genomics, Princeton, NJ 08544 United States of America
4 Department of Electrical Engineering, Princeton University, Princeton, NJ 08544, United States of America
5 Department of Chemical and Biological Engineering and PACM, Princeton University, Princeton, NJ 08544, United States of America
New Journal of Physics (2017) Volume 19 035002
Samco offers a couple of silicon Deep RIE systems for R&D and production. Please see the product page below.
Silicon Deep RIE Systems
Also, for more details of Samco silicon deep RIE process capabilities, please visit the process solution page below.
Slicon Deep RIE Technology for MEMS and TSV Processing
Scientific Paper on Microfluidic Chip Fabrication Using Silicon Deep RIE from Vietnam National University
Nguyen Ngan Le1,2, Kim Khanh Huynh1, Thi Cam Hue Phan1, Thi My Dung Dang1 and Mau Chien Dang1
1 Laboratory for Nanotechnology, Vietnam National University in Ho Chi Minh City, Community 6, Linh
Trung Ward, Thu Duc District, Ho Chi Minh, Vietnam
2 University of Science, Vietnam National University in Ho Chi Minh City, 227 Nguyen Van Cu Street,
District 5, Ho Chi Minh City, Vietnam
Adv. Nat. Sci.: Nanosci. Nanotechnol. 8 (2017) 015003
A microfluidic chip device was fabricated using deep silicon etching technology of the Bosch Process. Samco Deep RIE Tool RIE-200iPB was used for silicon etching over silver hard mask. With optimization of process recipe in the silicon etching, vertical silicon channel profile was fabricated.
For more details of our deep RIE process capabilities, please visit the pages below.
Silicon DRIE (Deep Reactive Ion Etching) for MEMS and TSV
Deep Silicon Trench/Via Hole/Pillar Etching using the Bosch Process