Author: Samco

11 Jul

Technical Report : GaN Trench Etching and Sidewall Angle Control for Vertical Power Device

Samco NEWS

GaN Trench Etch.jpg

Since gallium nitride (GaN) -based semiconductors, which are widely used in short-wavelength optical devices, have excellent physical properties, they are promising as materials for electronic devices such as power devices and RF devices. Some have already been put into practical use and are already on the market. Development aimed at further increasing performance is gaining momentum year by year, and it is expected that it will be widely adopted in the field of high frequency electronic devices.

For example, it is expected that electronic devices (trench MOS, HEMT, etc.) with high withstand voltage, low ON resistance, and high channel mobility will be realized within the next few years. Figure 1 shows an example of a GaN MOSFET structure adopting a trench structure and a gate recess type GaN HEMT structure.

Samco provides ICP-RIE equipmentCVD equipment and process technology for manufacturing GaN-based light emitting devices. We also provide processes that realize trench formation, mesa formation, etc., that are 4H-SiC high-power device manufacturing processes.

In this technical report, we will introduce a process solution that contributes to the formation of trench structures and recess structures when creating GaN devices.

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11 Jul

Technical Report : Next-generation GaAs VCSEL Plasma Etch Process Technology

Samco NEWS

HCG-VCSEL.jpg

The market for Vertical Cavity Surface Emitting Lasers (VCSEL), which were invented in 1977 by Professor Iga of Tokyo Institute of Technology, has been expanding in recent years for optical communication and sensor applications. The production process of VCSELs requires plasma etching and plasma enhanced CVD equipment, and our products are used by many users worldwide from research and development to mass production. This paper introduces the latest plasma etching process examples of VCSEL on our ICP etching system RIE-400iP.

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11 Jul

Equipment Advances for the Bosch Process

Samco 2021 NEWS, 2021 NEWS, NEWS, NEWS Archive

In this article, we introduce the hardware employed to fully utilize the capabilities of the Bosch process for deep etching of silicon. The equipment used for the Bosch process has many significant features that differentiate it from typical ICP etching tools.

Inductively Coupled Plasma (ICP) Source
First, let’s take a look at the heart of the ICP equipment – the ICP coil that generates the plasma. The Bosch process must deliver both a high etch rate and a vertical profile that are critical for deep silicon etch processes. Increases in the fluorine radical density increases the etch rate. Also, attracting fewer ions, which are created by current in the plasma sheath, at a high voltage makes the profiles vertical. To achieve both high etch rates and vertical sidewalls, it seems that the voltage should be increased while maintaining ion density. However, RF power has the following equation:

RF power (W) = Voltage (V) × Current (I)

The amount of etching of the passivation film on the bottom of the etch feature is proportional to the bias RF power (W). If the voltage (V) is increased while decreasing the current (I), the passivation film will be over-etched and the sidewall will have a reverse taper profile (Fig. 1).

01_Profiles.png
Fig. 1 Profiles processed by the Bosch process for each condition.

ICP etching equipment for the Bosch process generally uses cylindrical shaped ICP coils. There are two reasons for using a cylindrical ICP coil.. First, it is more efficient in delivering RF power to the plasma. Second, it is easier to control the ion and radical densities of the plasma.

In the case of the cylindrical ICP coil, high-density fluorine radicals and high-density ions are produced near the coil. However, due to the long distance between the ICP coil and the substrate, the ions are neutralized during transport to the lower/substrate electrode. As a result, the ion density in the plasma is drastically reduced. On the other hand, the fluorine radicals in the SF6 plasma are still being transported to the lower electrode while maintaining high density due to their long lifetime.

The planar ICP coil that is used for ion enhanced etching such as oxide etching, must transport the high-density ions required for ion etching to the lower/substrate electrode without reducing their density. For this reason, the ICP coil and the lower/substrate electrode are placed closer together to prevent neutralization of the ions.

02_ICP_coils.png

Fig. 2 Comparison of cylindrical and planar ICP coils.

Radio Frequency (RF) Power

RF power is used to “heat” electrons and create ions and radicals in the plasma. The higher the frequency, the easier it is for the RF power to be converted into plasma as electron energy and to create high-density ions and radicals. On the other hand, with lower frequency, less power is converted into plasma and more power is used to create ions instead.

With the focus on generating high density plasma, the ICP power source should be at a higher frequency. However, at very high frequencies, it is difficult to keep a uniform plasma due to the effects of standing wave nodes and valleys. Therefore, 13.56 MHz is a good balance between the ability to generate high-density plasma and the capability to sustain a uniform plasma. Because of that, most equipment manufacturers use 13.56 MHz as the frequency of the ICP power source.

For substrate bias, lower frequency seems to be better in terms of the strength to attract the ions. However, the lower the frequency, the greater is the fluctuation of the ions incident on the substrate. Also, 13.56 MHz has an advantage over other frequencies in terms of cost and compactness. For these reasons, some equipment manufacturers select the 13.56 MHz as the frequency of the bias RF power source, while others select a lower frequency such as 400 kHz. In some cases, both frequencies may be combined or pulse superimposed.

Deposition/Etch Switching
To achieve fast Deposition/Etch process switching of the Bosch process, the gas must have a rapid switching speed. The response time of the MFC alone is not sufficient to achieve the 0.1 second Deposition/Etch process step switching commonly required for the Bosch process. Instead, fast gas switching is enabled by using a combination of an MFC and a high-switching speed valve. The gas line from the MFC to the ICP source should also be as short as possible. The increase in length of the gas line creates a damping effect that slows the response and tends to reduce the quality of the passivation films.

Next, the impedance switching control of the RF matching unit is important. During gas switching, the impedance of the plasma fluctuates greatly. If the matching unit cannot keep up with these fluctuations, the plasma is not sustainable. This means that the ideal Bosch process cannot be carried out if the RF matching unit cannot keep up with the fast gas switching. In addition, stringent control of the pressure in the reaction chamber is required to prevent pressure set point “hunting”.

Turbo-Molecular Pump (TMP)
A less important item in other ICP etchers, but an important one in Si-DRIE, is the pumping speed of the TMP. The purpose of using TMP’s with higher pump speeds in the Bosch process is to allow for higher flow rate of SF6 without increasing the process pressure. TMPs for the Bosch-process have a special rotor blade construction to prevent them from crashing due to collision with solid reaction products generated by the process.

Substrate Stage Temperature
Lower substrate stage temperatures generally result in a faster deposition rate of passivation film, which means shorter processing time. However, depending on the type and thickness of the photoresist, lower stage temperatures may cause cracking of the photoresist mask. The hardware and maintenance costs are also higher for lower stage temperatureoperations.

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What the Samco Si-DRIE Can Do?

Anisotropic Silicon Deep Reactive Ion Etching process using the Bosch Process and Non-Bosch Process enables trench, hole and pillar fabrication for various device applications. These are some examples of structures fabricated using the Bosch Process. For more details, please visit the processes below.


Samco Product Portfolio for Silicon Deep Reactive Ion Etching

Our systems have industry-leading process capabilities, and the product lineup covers both R&D and production.

11 Jul

Loading effect and microloading effect in Si deep RIE

Samco 2021 NEWS, 2021 NEWS, NEWS, NEWS Archive, Technical Report

The loading effect and the microloading effect are common phenomena observed not only in deep Si etching but also in conventional Reactive Ion Etching (RIE), and are a barrier to achieving a depth uniformity in etching processes. These two effects strongly appear in the Bosch process (silicon deep reactive ion etching), which is mainly composed of fluorine radical etching. The loading effect is caused by the difference in the consumption rate of fluorine radicals as the etchants. The microloading effect is caused by the difference in the numbers of fluorine radicals transported in narrow spaces (Ex. trenches and holes with a high aspect ratio). Samco processes suppress these two effects and can control the etching depth and achieve excellent uniformity. In addition, the method of microloading effect suppressing can be applied to flattened bottom surface process, which we call the “flat bottom process”.

■Loading Effect

The loading effect is a phenomenon in which the etch rate change depending on Si aperture (unmasked area) ratios. On the surface of Si, the fluorine radicals are consumed and the by-product, SiF4, is increased. Therefore, a larger aperture ratio of Si area has less fluorine radicals, and the etching rate becomes lower. A typical example is that bare Si wafers show slower etch rates at the center where the Si is exposed to a higher density than at the outer periphery.

Figure 1 shows the etching rate dependency on the aperture ratio of an ø8 inch Si wafer. The etch rate is 40 μm / min at an aperture ratio of 1% and goes to 15 μm / min when the aperture ratio is above 40%.

image001.png

Fig. 1: Aperture ratio dependency of Si trench etch rate (ø8 inch wafer)

The loading effect is most noticeable when the sample includes both sparse and dense mask patterns, as shown in Figure 2a. In this case, there are two ways of tackling the loading effect issue. The first is to reduce the process pressure and promote gas diffusion. Figure 2b shows the relationship between the process pressure and the difference in depth between Depth 1 (sparse mask pattern) and Depth 2 (dense mask pattern) in Figure 2a. You can see that at lower process pressure, there is a smaller difference in depth. However, by lowering the pressure, the etch rate is also decreased. The second method is to create a dummy pattern on the wafer to reduce the density difference of the mask pattern.

image003.jpg

(a) Example of sparse and dense mask pattern

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(b) Pressure vs etch depth differences due to pattern density
Fig. 2: Pressure vs etch depth differences due to pattern density

■Microloading Effect

The microloading effect is a phenomenon in which fewer fluorine radicals transport the bottom of narrow gaps, causing the etch rate to decrease depending on pattern width. This phenomenon is also known as the RIE lag effect or ARDE (aspect ratio dependent etching). Figure 3 is an SEM image of the microloading effect after Si deep reactive ion etching.

image006.png

Fig. 3: SEM image of the microloading effect

When a pattern has a wide opening (right side of Fig. 3), fluorine radicals transport the bottom of trenches and holes easily, and can be processed at a high Si etch rate. However, when the pattern opening narrows (left side of Fig. 3), the etch rate gradually decreases with the number of fluorine radicals that are able to transport the bottom of the trench or hole. On the other hand, when processing pillar structures, the pattern width has little effect on the etch rate because the flow of fluorine radicals is not obstructed. In the case of trench and hole etching, it is more difficult for fluorine radicals to transport the bottom of patterns with high aspect ratios. This tendency is especially noticeable when etching holes, because radicals are obstructed independently of the direction from which they enter. This is unlike trenches, where radicals are less restricted when moving along the trench line. The rounded bottom seen in Fig. 3 is also due to side walls blocking the flow of fluorine radicals, which increases the ratio of radicals etching the center of the pattern.

スクリーンショット (103)_LI.jpgFig. 4: SEM image of narrow and wide trench etch

Figure 4 shows SEM images of a narrow trench (10 μm) and a wide trench (200 μm) connecting. When a wide trench pattern intersects a narrow trench pattern, fluorine radicals are able to flow from the wider area, increasing the etch rate thus achieving a higher aspect ratio than would be the case for a pattern of only narrow trenches. However, due to the flow of fluorine radicals from the wider area, scallops will form diagonally instead of horizontally. Comb-shaped MEMS devices are another example of patterns with a mixture of narrow and wide trenches. For comb-shaped MEMS devices on SOI (Silicon on Insulator) wafers, even with relatively high aspect ratios, it is possible to etch through to the insulating layer.

■Method for Suppressing Microloading Effect

Figure 5 compares the normal Bosch process with Samco’s method for suppressing the microloading effect. The normal Bosch process etches all of the passivation film on the bottom of the trench. Then, in the Si etching step, the etch rate is higher at the bottom of the wider pattern, especially in the center where fluorine radicals are more easily transported. As a result, depth uniformity worsens.

image011.jpg

Fig. 5: Diagram of the Samco process to suppress the microloading effect

To suppress the microloading effect, some process conditions, such as the pressure during the deposition step, must be adjusted. In the etch step, the difference in the thickness of the deposited film and the difference in the etch rate are balanced and cancel each other out, achieving total depth uniformity. The microloading effect can then be suppressed by optimizing the duration of film deposition and etching for all pattern widths. Figure 6 shows the result of adjusting the process conditions to control the microloading effect.

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Fig. 6: SEM images of control of the microloading effect

■Flat-Bottom Process

The process for suppressing the microloading effect can also be used for deep Si etching with a wide pattern as shown in Figure 7. This process suppresses not only the microloading effect, but also scallops and round shape at the bottom of trench and hole patterns. It enables anisotropic etching of patterns with widths of several hundred micrometers. However, adjusting process conditions to optimize the depth uniformity of the flat-bottom process is very challenging. Samco has a wealth of knowledge and process libraries for the flat-bottom process and is able to provide our customers with the most suitable deep Si etching processes.

image042.png

Fig. 7: SEM image of the flattened bottom of the wide pattern

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What the Samco Si-DRIE Can Do?

Anisotropic Silicon Deep Reactive Ion Etching process using the Bosch Process and Non-Bosch Process enables trench, hole and pillar fabrication for various device applications. These are some examples of structures fabricated using the Bosch Process. For more details, please visit the processes below.


Samco Product Portfolio for Silicon Deep Reactive Ion Etching

Our systems have industry-leading process capabilities, and the product lineup covers both R&D and production.

21 Apr

Samco sets up demonstration equipments to reinforce its expansion in the European compound semiconductor market

Samco 2021 NEWS, NEWS

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Samco, a leading manufacturer of plasma processing equipment for the compound semiconductor industry, announced that it has installed a plasma etch system and a UV ozone cleaning system for demonstration at samco-ucp ltd., Samco's European subsidiary, in Liechtenstein.

Europe is the base for many of the world's foremost R&D institutes and universities, including IMEC (Interuniversity Microelectronics Centre) in Belgium, Fraunhofer in Germany, or VTT in Finland. In order to develop the European market and strengthen our customer relationships, the RIE-10NR, the de fact standard plasma etch system for R&D, and the UV-2, a tabletop UV ozone cleaning system, have been set up at samco-ucp ltd. samco-ucp ltd. is located in Liechtenstein, next to Switzerland and easily accessible from the UK, Germany, France, Italy and other European countries.

The RIE-10NR with an installed base of over 400 systems worldwide is a compact, novel, low-cost equipment that can process wafers up to ø200 mm with excellent uniformity--with variable electrode gap configuration, making it ideal for R&D applications with a large process window.

Samco also has a great variety of production systems with reaction chambers based on the same concept for both, research and production customers. The RIE-10NR is used for a wide range of applications such as failure analysis and virus detection devices. Samco's increased presence in Europe represents a commitment to the renewed growth in semiconductor manufacturing in the region. The installation of demonstration systems will allow European customers to grips with our sophisticated systems and try out a range of samples and process parameters.

About samco-ucp ltd.
samco-ucp was founded on June 1, 2014, after Samco and UCP decided to join forces. Prior to this day, both companies were already well known in the thin film and plasma technologies.

About Samco Inc.
Samco Inc. (TSE: 6387), a leading manufacturer of plasma processing equipment for the compound semiconductor industry, was founded by Osamu Tsuji in Kyoto, Japan in 1979 with the meaning of Semiconductor And Materials COmpany. Over the past 40 years, more than 4,000 Samco systems have been installed and used in 30 different countries. Its equipment and thin film technology are widely used in the fabrication of semiconductor devices, including MicroLEDs, Laser Diodes, VCSELs, SiC Power Devices, GaN RF Devices, BAW / SAW Filters, MEMS, TSVs, and so on. Learn more at www.samco.co.jp/en

Company Contacts:

TSUCHIHASHI, Atsushi

Public Relations

Phone: 81-75-621-7841

E-mail: tsuchihashi@samco.co.jp

10 Dec

What is the Bosch Process (Deep Reactive Ion Etching)?

Samco NEWS

1 What is the Bosch Process?
Fig. 1 The Principles of the Bosch Process.png

Deep reactive ion etching (DRIE) of silicon to create high aspect ratio microstructures is one of the key processes in the advanced MEMS field and through silicon via (TSV) applications. However, conventional plasma etching processes are designed for etch depths of only a few microns and are lacking in etch-rate and etch mask selectivity. The Bosch process is capable of producing deep features with exceptional anisotropy, etch-rate, and etch mask selectivity.

This process consists of a three-step cycle: Film deposition, bottom film etching, and silicon etching. In the deposition process, a passivation film is deposited on the sidewalls and bottom surface of the trench. In the bottom film etching step, the passivation film on the trench bottom is selectively etched. In the silicon etching step, only the silicon at the trench bottom, where the passivation film has been removed, is etched (Fig. 1).

2 What is the chemical reaction of the Bosch process?
Fig. 2 ChemicalReactionNotes.png
The deposition step typically uses C4F8 gas as the deposition gas. C4F8 is a cyclic molecule (ring shaped), and in plasma, its ring is broken and it becomes a short chain molecule. Both ends of the C4F8 chain are active. The active parts of the chain combine with other molecules and the chain grows in length, attaching to the silicon and forming a membrane. This mem- brane functions as a passivation film during the silicon etching step preventing etching of the sidewalls.

SF6 is usually used as an etching gas for film etching and silicon etching. SF6 dissociates in plasma to form SF4 or SF2 and atomic fluorine that reacts with silicon. Both SF4 and the etching reaction product, SiF4, exist as gases that are evacuated from the chamber. SF4 is so stable that fluorine atoms cannot recombine with it. Therefore, a large amount of atomic fluorine can be produced and participates in the etching reaction.

CF4 decomposes to form atomic fluorine in plasma. However, the decomposition reaction is reversible, and it is not possible to produce a large amount of atomic fluorine from CF4NF3 nitridates the surface of silicon and prevents etching of silicon leading the etch rate to be about one-third of that of SF6.

3 Why is it important to separate film deposition and etching steps?
Fig. 3 SeparateC4F8SF6.png
The ring structure of C4F8 is broken and the chain-shaped C4F8 is generated in plasma. The polymerization reaction occurs when -(CF2)4 groups react with each other to form longer chains. The polymer forms the passivating film on the surfaces of the etched trenches. In the presence of SF6, the fluorine radicals from the dissociation of SF6 react with the chain -(CF2)4 groups and terminate the polymerization reaction. In addition, the fluorine radicals disappear as they are consumed by the termination reaction and thus, etching cannot occur. In summary, a quick gas switching every 0.1 sec is used to avoid the mixing of C4F8 and SF6 gases.

4 Different sidewall profiles with Bosch process.
Is the Bosch process easily realized by repeating the three steps? It is actually difficult and there are some Bosch process specific problems. Because step 3 of the Bosch process (Silicon etching process) is a chemical reaction with fluorine radicals, the etch rate is highly dependent on the aperture area of exposed silicon. This is often referred to as the loading-effect. Also, as the aspect ratio increases, the probability of fluorine radicals being transported to the bottom of the trench or hole is reduced. This results in pattern-dependent etch effects, which is generally referred to as micro loading that adversely affects depth uniformity. Micro loading results from the depletion of reactants when the wafer has local, higher-density areas. In addition, DRIE-specific problems include notching when etching SOI (Silicon on Insulator) wafers and tilt due to non-uniform plasma distribution. These problems are addressed by adjusting system hardware, process parameters and device structure.
Fig. 4 Typical sidewall profiles created by the Bosch process.png

Fig. 4 shows the different sidewall profiles that can be engineered with the Bosch process.

  1. The sidewall profile directly under the mask is vertical. It becomes gradually taper to the bottom.
  2. The sidewall profile directly under the mask is a reversed taper. It becomes vertical, and gradually tapers as the aspect ratio or etch depth increases.
  3. Reversed taper sidewall profile.

As long as the Bosch process is run, the etch feature will end up with one of the sidewall profiles, or the sidewall profile obtained by cutting off the upper part of that etch feature. For example, if vertical sidewall profile is needed, the top part of etch feature (1) can be cut and used.

Since the Bosch process is made up of three different steps, there are three times as many parameters as conventional ICP etching processes. This allows the Bosch process far more flexibility, but also increases the time needed to tune all of its process parameters. Samco has extensive knowledge and process know how with the Bosch process that enables us to better support our customers in the DRIE application space. Fig. 5 are process examples of different sidewall profiles achievable in our DRIE systems.

Fig. 5 Variety of sidewall profile controls created by the Bosch process.png

References

 

  1. Kokkoris, G., Goodyear, A., Cooke, M. and Gogolides, E. A global model for C4F8 plasmas coupling gas phase and wall surface reaction kinetics, Journal of Physics D: Applied Physics, 41, 19 (2008), 195211.
  2. Laerme, F., Schilp, A., Funk, K. and Offenberg, M. Bosch deep silicon etching: improving uniformity and etch rate for advanced MEMS applications, Technical Digest. IEEE International MEMS 99 Conference. Twelfth IEEE International Conference on Mi- cro Electro Mechanical Systems (Cat. No. 99CH36291)IEEE (1999).
  3. Nagaseki, K., Kobayashi, H., Ishikawa, I., Nishimura, E., Saito, Y. and Sug- anomata, S. Mass spectrometry of discharge products at 13.56 MHz in SF6 gas, Japanese journal of applied physics, 33, 7S (1994), 4348.
  4. Rangelow, I. W. Critical tasks in high aspect ratio silicon dry etching for microelec- tromechanical systems, Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films, 21, 4 (2003), 1550-1562.
  5. Wu, B., Kumar, A. and Pamarthy, S. High aspect ratio silicon etch: A review, Journal of applied physics, 108, 5 (2010), 9.

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What the Samco Si-DRIE Can Do?
Anisotropic Silicon Deep Reactive Ion Etching process using the Bosch Process and Non-Bosch Process enables trench, hole and pillar fabrication for various device applications. These are some examples of structures fabricated using the Bosch Process. For more details, please visit the processes below.


Samco Product Portfolio for Silicon Deep Reactive Ion Etching

Our systems have industry-leading process capabilities, and the product lineup covers both R&D and production.

14 Oct

Introduction to Si-DRIE (Silicon Deep Reactive Ion Etching)

Samco 2020 NEWS, Si DRIE

Silicon is most well-known as a semiconductor material, but because of its high mechanical strength and ease of processing, it is also commonly used in a wide variety of devices such as MEMS, optical components, micro-channel devices, and packaging. There are many methods for processing silicon, such as dry etching, wet etching, and laser processing, each of which has advantages and disadvantages that should be evaluated carefully and compared.

The processing method called Si-DRIE is a type of plasma dry etching. The etching technology cultivated for semiconductors has improved the processing of mechanical devices and has been proven to allow faster and deeper etching of features with higher aspect ratios. Among Si-DRIE techniques, there are three main process types: the Bosch process, Non-Bosch processes, and Cryogenic etching. Since silicon and fluorine atoms react very easily, processing silicon using a simple fluorine chemistry process results in an isotropic profile. Therefore, the key for increasing the verticality and aspect ratio for any of the three process types is to suppress lateral etching and develop an anisotropic process.

Isotropic and Anisotropic Etching.jpg

The Bosch process is a technique which alternates between depositing a protective film on the sidewall using a C4F8 plasma and etching the bottom of the trench or hole with SF6. The Non-Bosch process is a technique of simultaneously depositing a protective layer on the sidewall and directionally etching the bottom of the feature with ions. Cryogenic etching is a method similar to the Non-Bosch process and suppresses the chemical reaction of Si and F atoms on the sidewall by lowering the substrate temperature to that of liquid nitrogen.

Samco Bosch Process vs Non Bosch Process.png
The Bosch process has excellent selectivity and is capable of high aspect ratio etching and is often used for MEMS and packaging. On the other hand, the Non-Bosch process has smooth sidewalls with positive taper angle, which is useful for through-silicon vias (TSV). Additionally, the angle of the mask can be transferred into the etched material, which is often done for optical parts such as lenses. The Cryogenic etching process can achieve the selectivity of an oxide mask vs silicon equivalent to that of the Non-Bosch process. One drawback of this technique is that photo resist masks cannot be used due to the extremely low temperature of the process.

On Samco’s flagship RIE-800iPB deep reactive ion etching (DRIE) system it is possible to utilize both the Bosch and Non-Bosch processes on the same system. The Bosch process enables deep and high aspect features along with extraordinary levels of selectivity to the mask. The Non-Bosch process provides deep etching with smooth sidewalls and a flexible range of taper angles. Substrate temperatures between -10°C and 20°C are controlled via liquid cooling of the bias electrode combined with electrostatic chucking (ESC) and substrate back side He gas cooling. By combining these two methods, the RIE-800iPB delivers versatile, efficient, gentle and affordable solutions for MEMS, TSV, packaging, and other applications. It’s been exciting to see the continual evolution of our Si DRIE solutions as we incorporate new customer requirements into the system design. Do you have a process challenge? Give our experienced process engineers the opportunity to meet your challenge and exceed your expectations.

What the Samco Si-DRIE Can Do?
Anisotropic Silicon Deep Reactive Ion Etching process using the Bosch Process and Non-Bosch Process enables trench, hole and pillar fabrication for various device applications. These are some examples of structures fabricated using the Bosch Process. For more details, please visit the processes below.


Samco Product Portfolio for Silicon Deep Reactive Ion Etching

Our systems have industry-leading process capabilities, and the product lineup covers both R&D and production.

16 Sep

Samco launches new PECVD and ALD facility to support growth of deposition and coating business

Samco NEWS

Samco, a leading manufacturer of plasma processing equipment for the compound semiconductor industry, has announced the opening of its new Plasma Enhanced Chemical Vapour Deposition (PECVD) and Atomic Layer Deposition (ALD) demonstration facility at Samco’s headquarters, Kyoto.


The class 1000 cleanroom space of 217.61 square meters

Samco’s PECVD and ALD equipment are widely used in the manufacturing of optoelectronic and electronic devices. The positive outlook and the rapid growth of the 5G & IoT markets have fueled demand for PECVD and ALD process equipment for fabrication of communication devices and semiconductor lasers.

“This new facility is of strategic importance to Samco as it will enable further revenue growth in the compound semiconductor market. There will be ten PECVD and ALD systems for demonstration in the class 1000 cleanroom space of 217.61 square meters,” says Tsukasa Kawabe, Samco’s President and COO.

“The facility will greatly strengthen our ability to develop future process applications and technologies with our customers across the globe. The volume of demonstration tests requested by customers that can be handled is expected to be more than double the current level. Moreover, our customers and partners could collaborate with us in prototyping and pilot-line production utilizing the new facility,” he adds. “In particular, we are planning on conducting joint research and development projects with universities, research institutes, companies, and other external parties more aggressively than ever.”

Samco was founded in 1979 as a specialized manufacturer of PECVD equipment and in recent years has significantly expanded the sales of dry etching equipment for demanding applications, mostly for the compound semiconductor market.

“Samco’s three pillars of core technology are deposition, etching, and surface cleaning. We will leverage this new facility to further expand sales of the PECVD and ALD systems,” says Kawabe.

For more information, please visit our PECVD and ALD systems and processes.

01 Sep

High Performance In-situ Monitoring System for ICP Dry Etching

Samco NEWS

Introduction

Laser interferometric spectra and plasma emission spectra are widely used to realize precise dry etching depth control of compound semiconductor devices. However, fixed wavelength light sources for the laser interferometric systems are limited to analyze end point detection signals. Our ICP dry etching systems such as the RIE-400iP, and RIE-800iP are equipped with a highperformance in-situ monitoring system that can analyze multiple wavelengths from the reflected light of Xe or Xe-Hg (or Halogen lamp). The system is also capable of detecting the variation of plasma emission intensity simultaneously. In this work, we present examples of applying the high-performance in-situ monitoring system to GaAs, InP, and GaN-based device structure etching, and discuss the possibility of highly accurate and stable etching depth control.

To continue, please submit the form.

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05 May

Technical Report : GaN Etching for MiniLED and MicroLED Applications

Samco 2020 NEWS, NEWS, Technical Report

Introduction

Over the last year, next-generation microLED displays have begun to surpass the conventional liquid crystal and organic EL displays, and are starting to attract more and more attention from industry leaders. While the exact definition of microLED hasnʼt been decided by the display industry, “microLED” typically refers to an LED chip with side lengths of 100 microns down to several microns. LED chips in the 100 to 200 micron range, such as those used in Samsungʼs famous The Wall, are typically referred to as “miniLEDs.”

Like traditional LEDs, microLED chips have rows and columns of semiconductor structures which emit a combination of red, green or blue light to produce a wide range of colors. The materials used as the semiconductor elements in an LED chip determine their color. The most commonly used materials are InGaN for green, blue and white LEDs and AlGaInP for red, orange and yellow LEDs. Gallium nitride (GaN) is an excellent semiconductor material for LEDs because of its direct bandgap, high electron Samco’s Solution for Micro LEDs mobility and thermal conductivity. By mixing GaN with a small percentage of indium nitride (InN) it is possible to tune the band gap to efficiently emit green, blue or white light.

At submillimeter sizes, microLED chips can be fabricated and put into arrays to be used as individual RGB pixels in TV and smartphone displays with higher brightness and lower power consumption than ever before. MicroLEDs also have near perfect black levels which, when paired with their brightness, means an excellent contrast ratio making them ideal for high dynamic range (HDR), augment reality (AR) displays and heads-up displays (HUD). Of course, with new technological breakthroughs there are always some hurdles to overcome. For microLED technology the largest challenge is finding cost effective methods to produce displays with millions of microLEDs. Another critical factor when an LED shrinks is the defect density. It has been demonstrated that the impact of sidewall defects, generated during the etching process, on device performance cannot be ignored for LEDs at the micro-level size. This is due to the increased importance of Shockley-Read-Hall recombination as the size of GaN-based LEDs shrink. On the other hand, microLEDs with perfectly fabricated sidewalls actually see an increase in efficiency as they decrease in size.

The challenge of GaN etching is that the tight crystalline bond strengths in group III nitride materials are what gives them attractively wide bandgaps, but it also makes the material chemically inert and difficult to etch. In particular, there is difficulty in obtaining smooth etched sidewalls because of the inherent generation of damage inducing ions in dry etching processes.6 To address this, Samco uses an inductively coupled plasma reactive ion etching (ICP-RIE) process with chlorine-chemistry which can achieve high etch rates for mesa etching while maintaining smooth and highly anisotropic sidewalls.

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