Category: 2020 NEWS

14 Oct

Introduction to Si-DRIE (Silicon Deep Reactive Ion Etching)

Samco 2020 NEWS, Si DRIE

Silicon is most well-known as a semiconductor material, but because of its high mechanical strength and ease of processing, it is also commonly used in a wide variety of devices such as MEMS, optical components, micro-channel devices, and packaging. There are many methods for processing silicon, such as dry etching, wet etching, and laser processing, each of which has advantages and disadvantages that should be evaluated carefully and compared.

The processing method called Si-DRIE is a type of plasma dry etching. The etching technology cultivated for semiconductors has improved the processing of mechanical devices and has been proven to allow faster and deeper etching of features with higher aspect ratios. Among Si-DRIE techniques, there are three main process types: the Bosch process, Non-Bosch processes, and Cryogenic etching. Since silicon and fluorine atoms react very easily, processing silicon using a simple fluorine chemistry process results in an isotropic profile. Therefore, the key for increasing the verticality and aspect ratio for any of the three process types is to suppress lateral etching and develop an anisotropic process.

Isotropic and Anisotropic Etching.jpg

The Bosch process is a technique which alternates between depositing a protective film on the sidewall using a C4F8 plasma and etching the bottom of the trench or hole with SF6. The Non-Bosch process is a technique of simultaneously depositing a protective layer on the sidewall and directionally etching the bottom of the feature with ions. Cryogenic etching is a method similar to the Non-Bosch process and suppresses the chemical reaction of Si and F atoms on the sidewall by lowering the substrate temperature to that of liquid nitrogen.

Samco Bosch Process vs Non Bosch Process.png
The Bosch process has excellent selectivity and is capable of high aspect ratio etching and is often used for MEMS and packaging. On the other hand, the Non-Bosch process has smooth sidewalls with positive taper angle, which is useful for through-silicon vias (TSV). Additionally, the angle of the mask can be transferred into the etched material, which is often done for optical parts such as lenses. The Cryogenic etching process can achieve the selectivity of an oxide mask vs silicon equivalent to that of the Non-Bosch process. One drawback of this technique is that photo resist masks cannot be used due to the extremely low temperature of the process.

On Samco’s flagship RIE-800iPB deep reactive ion etching (DRIE) system it is possible to utilize both the Bosch and Non-Bosch processes on the same system. The Bosch process enables deep and high aspect features along with extraordinary levels of selectivity to the mask. The Non-Bosch process provides deep etching with smooth sidewalls and a flexible range of taper angles. Substrate temperatures between -10°C and 20°C are controlled via liquid cooling of the bias electrode combined with electrostatic chucking (ESC) and substrate back side He gas cooling. By combining these two methods, the RIE-800iPB delivers versatile, efficient, gentle and affordable solutions for MEMS, TSV, packaging, and other applications. It’s been exciting to see the continual evolution of our Si DRIE solutions as we incorporate new customer requirements into the system design. Do you have a process challenge? Give our experienced process engineers the opportunity to meet your challenge and exceed your expectations.

What the Samco Si-DRIE Can Do?
Anisotropic Silicon Deep Reactive Ion Etching process using the Bosch Process and Non-Bosch Process enables trench, hole and pillar fabrication for various device applications. These are some examples of structures fabricated using the Bosch Process. For more details, please visit the processes below.


Samco Product Portfolio for Silicon Deep Reactive Ion Etching

Our systems have industry-leading process capabilities, and the product lineup covers both R&D and production.

05 May

Technical Report : GaN Etching for MiniLED and MicroLED Applications

Samco 2020 NEWS, NEWS, Technical Report

Introduction

Over the last year, next-generation microLED displays have begun to surpass the conventional liquid crystal and organic EL displays, and are starting to attract more and more attention from industry leaders. While the exact definition of microLED hasnʼt been decided by the display industry, “microLED” typically refers to an LED chip with side lengths of 100 microns down to several microns. LED chips in the 100 to 200 micron range, such as those used in Samsungʼs famous The Wall, are typically referred to as “miniLEDs.”

Like traditional LEDs, microLED chips have rows and columns of semiconductor structures which emit a combination of red, green or blue light to produce a wide range of colors. The materials used as the semiconductor elements in an LED chip determine their color. The most commonly used materials are InGaN for green, blue and white LEDs and AlGaInP for red, orange and yellow LEDs. Gallium nitride (GaN) is an excellent semiconductor material for LEDs because of its direct bandgap, high electron Samco’s Solution for Micro LEDs mobility and thermal conductivity. By mixing GaN with a small percentage of indium nitride (InN) it is possible to tune the band gap to efficiently emit green, blue or white light.

At submillimeter sizes, microLED chips can be fabricated and put into arrays to be used as individual RGB pixels in TV and smartphone displays with higher brightness and lower power consumption than ever before. MicroLEDs also have near perfect black levels which, when paired with their brightness, means an excellent contrast ratio making them ideal for high dynamic range (HDR), augment reality (AR) displays and heads-up displays (HUD). Of course, with new technological breakthroughs there are always some hurdles to overcome. For microLED technology the largest challenge is finding cost effective methods to produce displays with millions of microLEDs. Another critical factor when an LED shrinks is the defect density. It has been demonstrated that the impact of sidewall defects, generated during the etching process, on device performance cannot be ignored for LEDs at the micro-level size. This is due to the increased importance of Shockley-Read-Hall recombination as the size of GaN-based LEDs shrink. On the other hand, microLEDs with perfectly fabricated sidewalls actually see an increase in efficiency as they decrease in size.

The challenge of GaN etching is that the tight crystalline bond strengths in group III nitride materials are what gives them attractively wide bandgaps, but it also makes the material chemically inert and difficult to etch. In particular, there is difficulty in obtaining smooth etched sidewalls because of the inherent generation of damage inducing ions in dry etching processes.6 To address this, Samco uses an inductively coupled plasma reactive ion etching (ICP-RIE) process with chlorine-chemistry which can achieve high etch rates for mesa etching while maintaining smooth and highly anisotropic sidewalls.

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24 Mar

Technical Report : New Etching and Deposition Approach for Trench-Type SiC MOSFET

Samco 2020 NEWS, NEWS, Technical Report Tags: , , , , ,

Introduction

Compared to the mainstream semiconductor Si, the wide bandgap semiconductor 4H-SiC has excellent material qualities including higher electrical breakdown strength and higher thermal conductivity.Therefore, 4H-SiC has been studied in recent years as a new material to improve miniaturization and energy saving in power devices. Currently, it is being developed not only for device fabrication but also for practical
applications in the automotive and power supply industries. SiC MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are one example of commonly used 4H-SiC power devices that surpass Si power devices in terms of high voltage endurance, low on-resistance, and high-speed switching. Trench type SiC MOSFETs are being developed and have shown that they are capable of achieving a reduced on-resistance, which is highly demanded in current devices. We have been developing a trench etching process using plasma dry etching and deposition of the gate insulator using ALD (Atomic Layer Deposition) and PECVD (Plasma Enhanced Chemical Vapor Deposition). These processes are required for manufacturing trench type SiC MOSFETs.
In this paper, we will highlight the SiC trench etching and gate insulator deposition results.

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