Category: NEWS

10 Dec

What is the Bosch Process (Deep Reactive Ion Etching)?

Samco NEWS

1 What is the Bosch Process?
Fig. 1 The Principles of the Bosch Process.png

Deep reactive ion etching (DRIE) of silicon to create high aspect ratio microstructures is one of the key processes in the advanced MEMS field and through silicon via (TSV) applications. However, conventional plasma etching processes are designed for etch depths of only a few microns and are lacking in etch-rate and etch mask selectivity. The Bosch process is capable of producing deep features with exceptional anisotropy, etch-rate, and etch mask selectivity.

This process consists of a three-step cycle: Film deposition, bottom film etching, and silicon etching. In the deposition process, a passivation film is deposited on the sidewalls and bottom surface of the trench. In the bottom film etching step, the passivation film on the trench bottom is selectively etched. In the silicon etching step, only the silicon at the trench bottom, where the passivation film has been removed, is etched (Fig. 1).

2 What is the chemical reaction of the Bosch process?
Fig. 2 ChemicalReactionNotes.png
The deposition step typically uses C4F8 gas as the deposition gas. C4F8 is a cyclic molecule (ring shaped), and in plasma, its ring is broken and it becomes a short chain molecule. Both ends of the C4F8 chain are active. The active parts of the chain combine with other molecules and the chain grows in length, attaching to the silicon and forming a membrane. This mem- brane functions as a passivation film during the silicon etching step preventing etching of the sidewalls.

SF6 is usually used as an etching gas for film etching and silicon etching. SF6 dissociates in plasma to form SF4 or SF2 and atomic fluorine that reacts with silicon. Both SF4 and the etching reaction product, SiF4, exist as gases that are evacuated from the chamber. SF4 is so stable that fluorine atoms cannot recombine with it. Therefore, a large amount of atomic fluorine can be produced and participates in the etching reaction.

CF4 decomposes to form atomic fluorine in plasma. However, the decomposition reaction is reversible, and it is not possible to produce a large amount of atomic fluorine from CF4NF3 nitridates the surface of silicon and prevents etching of silicon leading the etch rate to be about one-third of that of SF6.

3 Why is it important to separate film deposition and etching steps?
Fig. 3 SeparateC4F8SF6.png
The ring structure of C4F8 is broken and the chain-shaped C4F8 is generated in plasma. The polymerization reaction occurs when -(CF2)4 groups react with each other to form longer chains. The polymer forms the passivating film on the surfaces of the etched trenches. In the presence of SF6, the fluorine radicals from the dissociation of SF6 react with the chain -(CF2)4 groups and terminate the polymerization reaction. In addition, the fluorine radicals disappear as they are consumed by the termination reaction and thus, etching cannot occur. In summary, a quick gas switching every 0.1 sec is used to avoid the mixing of C4F8 and SF6 gases.

4 Different sidewall profiles with Bosch process.
Is the Bosch process easily realized by repeating the three steps? It is actually difficult and there are some Bosch process specific problems. Because step 3 of the Bosch process (Silicon etching process) is a chemical reaction with fluorine radicals, the etch rate is highly dependent on the aperture area of exposed silicon. This is often referred to as the loading-effect. Also, as the aspect ratio increases, the probability of fluorine radicals being transported to the bottom of the trench or hole is reduced. This results in pattern-dependent etch effects, which is generally referred to as micro loading that adversely affects depth uniformity. Micro loading results from the depletion of reactants when the wafer has local, higher-density areas. In addition, DRIE-specific problems include notching when etching SOI (Silicon on Insulator) wafers and tilt due to non-uniform plasma distribution. These problems are addressed by adjusting system hardware, process parameters and device structure.
Fig. 4 Typical sidewall profiles created by the Bosch process.png

Fig. 4 shows the different sidewall profiles that can be engineered with the Bosch process.

  1. The sidewall profile directly under the mask is vertical. It becomes gradually taper to the bottom.
  2. The sidewall profile directly under the mask is a reversed taper. It becomes vertical, and gradually tapers as the aspect ratio or etch depth increases.
  3. Reversed taper sidewall profile.

As long as the Bosch process is run, the etch feature will end up with one of the sidewall profiles, or the sidewall profile obtained by cutting off the upper part of that etch feature. For example, if vertical sidewall profile is needed, the top part of etch feature (1) can be cut and used.

Since the Bosch process is made up of three different steps, there are three times as many parameters as conventional ICP etching processes. This allows the Bosch process far more flexibility, but also increases the time needed to tune all of its process parameters. Samco has extensive knowledge and process know how with the Bosch process that enables us to better support our customers in the DRIE application space. Fig. 5 are process examples of different sidewall profiles achievable in our DRIE systems.

Fig. 5 Variety of sidewall profile controls created by the Bosch process.png

References

 

  1. Kokkoris, G., Goodyear, A., Cooke, M. and Gogolides, E. A global model for C4F8 plasmas coupling gas phase and wall surface reaction kinetics, Journal of Physics D: Applied Physics, 41, 19 (2008), 195211.
  2. Laerme, F., Schilp, A., Funk, K. and Offenberg, M. Bosch deep silicon etching: improving uniformity and etch rate for advanced MEMS applications, Technical Digest. IEEE International MEMS 99 Conference. Twelfth IEEE International Conference on Mi- cro Electro Mechanical Systems (Cat. No. 99CH36291)IEEE (1999).
  3. Nagaseki, K., Kobayashi, H., Ishikawa, I., Nishimura, E., Saito, Y. and Sug- anomata, S. Mass spectrometry of discharge products at 13.56 MHz in SF6 gas, Japanese journal of applied physics, 33, 7S (1994), 4348.
  4. Rangelow, I. W. Critical tasks in high aspect ratio silicon dry etching for microelec- tromechanical systems, Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films, 21, 4 (2003), 1550-1562.
  5. Wu, B., Kumar, A. and Pamarthy, S. High aspect ratio silicon etch: A review, Journal of applied physics, 108, 5 (2010), 9.

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What the Samco Si-DRIE Can Do?
Anisotropic Silicon Deep Reactive Ion Etching process using the Bosch Process and Non-Bosch Process enables trench, hole and pillar fabrication for various device applications. These are some examples of structures fabricated using the Bosch Process. For more details, please visit the processes below.


Samco Product Portfolio for Silicon Deep Reactive Ion Etching

Our systems have industry-leading process capabilities, and the product lineup covers both R&D and production.

14 Oct

Introduction to Si-DRIE (Silicon Deep Reactive Ion Etching)

Samco 2020 NEWS, Si DRIE

Silicon is most well-known as a semiconductor material, but because of its high mechanical strength and ease of processing, it is also commonly used in a wide variety of devices such as MEMS, optical components, micro-channel devices, and packaging. There are many methods for processing silicon, such as dry etching, wet etching, and laser processing, each of which has advantages and disadvantages that should be evaluated carefully and compared.

The processing method called Si-DRIE is a type of plasma dry etching. The etching technology cultivated for semiconductors has improved the processing of mechanical devices and has been proven to allow faster and deeper etching of features with higher aspect ratios. Among Si-DRIE techniques, there are three main process types: the Bosch process, Non-Bosch processes, and Cryogenic etching. Since silicon and fluorine atoms react very easily, processing silicon using a simple fluorine chemistry process results in an isotropic profile. Therefore, the key for increasing the verticality and aspect ratio for any of the three process types is to suppress lateral etching and develop an anisotropic process.

Isotropic and Anisotropic Etching.jpg

The Bosch process is a technique which alternates between depositing a protective film on the sidewall using a C4F8 plasma and etching the bottom of the trench or hole with SF6. The Non-Bosch process is a technique of simultaneously depositing a protective layer on the sidewall and directionally etching the bottom of the feature with ions. Cryogenic etching is a method similar to the Non-Bosch process and suppresses the chemical reaction of Si and F atoms on the sidewall by lowering the substrate temperature to that of liquid nitrogen.

Samco Bosch Process vs Non Bosch Process.png
The Bosch process has excellent selectivity and is capable of high aspect ratio etching and is often used for MEMS and packaging. On the other hand, the Non-Bosch process has smooth sidewalls with positive taper angle, which is useful for through-silicon vias (TSV). Additionally, the angle of the mask can be transferred into the etched material, which is often done for optical parts such as lenses. The Cryogenic etching process can achieve the selectivity of an oxide mask vs silicon equivalent to that of the Non-Bosch process. One drawback of this technique is that photo resist masks cannot be used due to the extremely low temperature of the process.

On Samco’s flagship RIE-800iPB deep reactive ion etching (DRIE) system it is possible to utilize both the Bosch and Non-Bosch processes on the same system. The Bosch process enables deep and high aspect features along with extraordinary levels of selectivity to the mask. The Non-Bosch process provides deep etching with smooth sidewalls and a flexible range of taper angles. Substrate temperatures between -10°C and 20°C are controlled via liquid cooling of the bias electrode combined with electrostatic chucking (ESC) and substrate back side He gas cooling. By combining these two methods, the RIE-800iPB delivers versatile, efficient, gentle and affordable solutions for MEMS, TSV, packaging, and other applications. It’s been exciting to see the continual evolution of our Si DRIE solutions as we incorporate new customer requirements into the system design. Do you have a process challenge? Give our experienced process engineers the opportunity to meet your challenge and exceed your expectations.

What the Samco Si-DRIE Can Do?
Anisotropic Silicon Deep Reactive Ion Etching process using the Bosch Process and Non-Bosch Process enables trench, hole and pillar fabrication for various device applications. These are some examples of structures fabricated using the Bosch Process. For more details, please visit the processes below.


Samco Product Portfolio for Silicon Deep Reactive Ion Etching

Our systems have industry-leading process capabilities, and the product lineup covers both R&D and production.

16 Sep

Samco launches new PECVD and ALD facility to support growth of deposition and coating business

Samco NEWS

Samco, a leading manufacturer of plasma processing equipment for the compound semiconductor industry, has announced the opening of its new Plasma Enhanced Chemical Vapour Deposition (PECVD) and Atomic Layer Deposition (ALD) demonstration facility at Samco’s headquarters, Kyoto.


The class 1000 cleanroom space of 217.61 square meters

Samco’s PECVD and ALD equipment are widely used in the manufacturing of optoelectronic and electronic devices. The positive outlook and the rapid growth of the 5G & IoT markets have fueled demand for PECVD and ALD process equipment for fabrication of communication devices and semiconductor lasers.

“This new facility is of strategic importance to Samco as it will enable further revenue growth in the compound semiconductor market. There will be ten PECVD and ALD systems for demonstration in the class 1000 cleanroom space of 217.61 square meters,” says Tsukasa Kawabe, Samco’s President and COO.

“The facility will greatly strengthen our ability to develop future process applications and technologies with our customers across the globe. The volume of demonstration tests requested by customers that can be handled is expected to be more than double the current level. Moreover, our customers and partners could collaborate with us in prototyping and pilot-line production utilizing the new facility,” he adds. “In particular, we are planning on conducting joint research and development projects with universities, research institutes, companies, and other external parties more aggressively than ever.”

Samco was founded in 1979 as a specialized manufacturer of PECVD equipment and in recent years has significantly expanded the sales of dry etching equipment for demanding applications, mostly for the compound semiconductor market.

“Samco’s three pillars of core technology are deposition, etching, and surface cleaning. We will leverage this new facility to further expand sales of the PECVD and ALD systems,” says Kawabe.

For more information, please visit our PECVD and ALD systems and processes.

01 Sep

High Performance In-situ Monitoring System for ICP Dry Etching

Samco NEWS

Introduction

Laser interferometric spectra and plasma emission spectra are widely used to realize precise dry etching depth control of compound semiconductor devices. However, fixed wavelength light sources for the laser interferometric systems are limited to analyze end point detection signals. Our ICP dry etching systems such as the RIE-400iP, and RIE-800iP are equipped with a highperformance in-situ monitoring system that can analyze multiple wavelengths from the reflected light of Xe or Xe-Hg (or Halogen lamp). The system is also capable of detecting the variation of plasma emission intensity simultaneously. In this work, we present examples of applying the high-performance in-situ monitoring system to GaAs, InP, and GaN-based device structure etching, and discuss the possibility of highly accurate and stable etching depth control.

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Download Abstract of CS MANTECH 2020

05 May

Technical Report : GaN Etching for MiniLED and MicroLED Applications

Samco 2020 NEWS, NEWS, Technical Report

Introduction

Over the last year, next-generation microLED displays have begun to surpass the conventional liquid crystal and organic EL displays, and are starting to attract more and more attention from industry leaders. While the exact definition of microLED hasnʼt been decided by the display industry, “microLED” typically refers to an LED chip with side lengths of 100 microns down to several microns. LED chips in the 100 to 200 micron range, such as those used in Samsungʼs famous The Wall, are typically referred to as “miniLEDs.”

Like traditional LEDs, microLED chips have rows and columns of semiconductor structures which emit a combination of red, green or blue light to produce a wide range of colors. The materials used as the semiconductor elements in an LED chip determine their color. The most commonly used materials are InGaN for green, blue and white LEDs and AlGaInP for red, orange and yellow LEDs. Gallium nitride (GaN) is an excellent semiconductor material for LEDs because of its direct bandgap, high electron Samco’s Solution for Micro LEDs mobility and thermal conductivity. By mixing GaN with a small percentage of indium nitride (InN) it is possible to tune the band gap to efficiently emit green, blue or white light.

At submillimeter sizes, microLED chips can be fabricated and put into arrays to be used as individual RGB pixels in TV and smartphone displays with higher brightness and lower power consumption than ever before. MicroLEDs also have near perfect black levels which, when paired with their brightness, means an excellent contrast ratio making them ideal for high dynamic range (HDR), augment reality (AR) displays and heads-up displays (HUD). Of course, with new technological breakthroughs there are always some hurdles to overcome. For microLED technology the largest challenge is finding cost effective methods to produce displays with millions of microLEDs. Another critical factor when an LED shrinks is the defect density. It has been demonstrated that the impact of sidewall defects, generated during the etching process, on device performance cannot be ignored for LEDs at the micro-level size. This is due to the increased importance of Shockley-Read-Hall recombination as the size of GaN-based LEDs shrink. On the other hand, microLEDs with perfectly fabricated sidewalls actually see an increase in efficiency as they decrease in size.

The challenge of GaN etching is that the tight crystalline bond strengths in group III nitride materials are what gives them attractively wide bandgaps, but it also makes the material chemically inert and difficult to etch. In particular, there is difficulty in obtaining smooth etched sidewalls because of the inherent generation of damage inducing ions in dry etching processes.6 To address this, Samco uses an inductively coupled plasma reactive ion etching (ICP-RIE) process with chlorine-chemistry which can achieve high etch rates for mesa etching while maintaining smooth and highly anisotropic sidewalls.

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Download Technical Report

24 Mar

Technical Report : New Etching and Deposition Approach for Trench-Type SiC MOSFET

Samco 2020 NEWS, NEWS, Technical Report Tags: , , , , ,

Introduction

Compared to the mainstream semiconductor Si, the wide bandgap semiconductor 4H-SiC has excellent material qualities including higher electrical breakdown strength and higher thermal conductivity.Therefore, 4H-SiC has been studied in recent years as a new material to improve miniaturization and energy saving in power devices. Currently, it is being developed not only for device fabrication but also for practical
applications in the automotive and power supply industries. SiC MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are one example of commonly used 4H-SiC power devices that surpass Si power devices in terms of high voltage endurance, low on-resistance, and high-speed switching. Trench type SiC MOSFETs are being developed and have shown that they are capable of achieving a reduced on-resistance, which is highly demanded in current devices. We have been developing a trench etching process using plasma dry etching and deposition of the gate insulator using ALD (Atomic Layer Deposition) and PECVD (Plasma Enhanced Chemical Vapor Deposition). These processes are required for manufacturing trench type SiC MOSFETs.
In this paper, we will highlight the SiC trench etching and gate insulator deposition results.

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20 Nov

Deputy Prime Minister of Liechtenstein Meets with Samco Chairman and CEO Osamu Tsuji

Samco 2016 NEWS, NEWS

Deputy Prime Minister of Liechtenstein Thomas Zwiefelhofer invited Samco Chairman and CEO Osamu Tsuji, samco-ucp President Christian Linder and samco-ucp Director Nakanobu Seki to the country’s government building in Vaduz at the beginning of November in order to express his gratitude to Samco for making Liechtenstein its sales and service base in Europe through its subsidiary samco-ucp.

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03 Aug

Samco opens new office in Malaysia, strengthens presence in Southeast Asia

Samco 2016 NEWS, Latest, NEWS

Samco, a semiconductor process equipment developer and manufacturer based in Japan, announced that it will open its Malaysia branch office on Aug. 10, 2016 in Petaling Jaya, a suburb of Kuala Lumpur.

“With our new office conveniently located near Kuala Lumpur, we expect to better serve Malaysia’s research universities and manufacturers,” says Osamu Tsuji, Samco’s chairman, president and CEO.  “Four company representatives will be assigned to this new location, where they will actively provide production-type systems and services, consisting of the three major technologies Samco specializes in.”

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20 Jun

Samco boosts shipment capacity with second production center

Samco 2016 NEWS, Latest, NEWS

Samco, a Japan-based semiconductor processing equipment manufacturer, held a completion ceremony for its second production center on June 17.  The new production center, which began construction in January and is expected to begin operations during the fall of this year, boosts Samco’s original shipment capacity of 6-7 billion yen per year to a total of 10-11 billion yen per year.

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13 Apr

Samco increases local sales staff for North American, European and Asian locations, aims to expand overseas sales

Samco 2016 NEWS, Latest, NEWS

Samco is employing around 20 more people at its locations in North America, China, Taiwan and Singapore, as well as its subsidiary Samco-UCP in Liechtenstein, in order to better provide services and support to overseas customers.

“Increasing the number of Samco employees abroad is part of the company’s larger strategy to optimize our current sales structure while actively growing our customer base across the globe,” says Osamu Tsuji, Samco’s President, Chairman and CEO.

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